RD
Which of the following memory testing algorithms detect the most types of faults?
MATS++
MATS+
MARCH C--
MARCH A
For the interconnection test between the boundary scan circuits in the figure, circuits implemented in TTL technology, which of the following output sequences is correct if the input sequence is xxxx100xxxxxxxxx?
xxxxxxxxxxxx0011
xxxxxxxxxxxx0010
xxxxxxxxxxxx0100
xxxxxxxxxxxx1100
What is the relationship between MTBF_TMR and the MTBF of a single component (MTTF_simplex)?
MTBF_TMR < MTTF_simplex
MTBF_TMR > MTTF_simplex
MTBF_TMR= MTTF_simplex
What is the mean time between failures according to the Jelinski-Moranda model?
γ(N-k)
1/(γ(N-k+1)
γ(Nk+1)
1/(γ(N-k))
Match the concepts with their correct definitions: Concepts: 1 – Controllability 2 – Observability 3 – Predictability Definitions: A. The ability to obtain known values at outputs in response to a given set of input stimuli. B. The ability to set a specified signal value at a particular circuit node by assigning values at primary inputs. C. The ability to determine the value of a signal at a specific circuit node by controlling primary inputs and observing primary outputs.
1-a, 2-c, 3-a
1-c, 2-a, 2-b
1-a, 2-b, 3-c
1-b, 2-a, 3-c
1-b, 2-c, 3-a
1-c, 2-b, 3-a
Intel co-founder and chairman Gordon Moore predicted in 1965 that the number of transistors on a chip would double every:
18-24 months
16-22 months
20-26 months
18-24 years
Given the reliability of the following components: R1=0.91; R2=0.98; R3=0.89; R4=0.9, choose the correct relationship based on the figures below:
Ra = 1; Rb < 1
Ra = Rb
Ra < 1; Rb = 1
Ra > Rb
Ra < Rb
What is the main advantage of RAID 0 (Striping)?
Faster data access
Improved data reliability
Higher stability
Magneto-resistive memory
What is the reliability function of a TMR system if z = constant and Rvot(1) = 1?
RFM_TMR = 3e² - 2e³
RFM_TMR = 2e² - e³
RFM_TMR = 2e³ - 3e²
RFM_TMR = e² - 2e³
Identify the correct signals in the IEEE 1149.1 Instruction Register:
4-Mode and 6-UpdateIR and 9-TRST
4-ShiftIR and 6-UpdateIR and 9-TRST
4-ShiftIR and 6-Update and 9-Reset
4-ShiftIR and 6-Mode and 9-Reset
Which of the following steps does NOT belong to a chip test plan?
Design verification
Testability analysis
Performance enhancement of the chip
Fault collapsing
The normal (Gaussian) distribution is used for reliability modeling during:
Maintenance actions
Wear-out period
Burn-in period
Aging period
Which of the following causal relationships is the most accurate?
Failure → Fault → Defect
Defect → Fault → Failure
Fault → Failure → Defect
Fault → Failure → Defect
What are the values of XXX and YYY in the following statement? "A wide acceptance range for a coverage test is associated with a sensitivity of XXX and a specificity of YYY."
XXX low, YYY high
XXX high, YYY low
XXX low, YYY low
XXX high, YYY high
A batch of 40 devices is tested for 500 hours. The following failures are recorded: 1 failure after 100 hours, 8 more failures after 180 hours, and 11 more after 320 hours. What is the failure rate if considered constant?
a
b
c
d
What type of memory fault is represented by the transition diagram?
Stuck-at Fault
Idempotent Coupling Fault
Inversion Coupling Fault
Transition Fault
Given the reliability of the following components: R1= R2 = R3 = R4 = 0.9, what is the correct system configuration for ensuring all components work for system fun
d
a
b
c
Which of the following are ad-hoc design-for-testability rules?
Adding LSSD registers
Activating internal oscillators and clocks during testing
Partitioning large combinational circuits
Avoiding logical redundancy
What are the advantages of functional testing?
It is independent of specifications
Allows at-speed testing
Has diagnostic capabilities
Does not require customer orientation
Which of the following reliability relations are true for a hardware component (t - time, R - reliability)?
t1 > t2 => R(t1) > R(t2)
t1 > t2 => R(t1) < R(t2)
t1 < t2 => R(t1) < R(t2)
t1 < t2 => R(t1) > R(t2)
Where can fault simulation be used?
In design verification, in the presence of faults
In testability analysis
In fault dictionary construction
In circuit operation analysis, without faults
What is the percentage range of undetected faults remaining after stuck-at and functional testing?
30-40%
40-50%
10-20%
20-30%
What is the correct order of operational modes in test mode according to IEEE 1149.1?
SCAN → UPDATE → CAPTURE → SCAN
CAPTURE → SCAN → UPDATE → SCAN
UPDATE → SCAN → CAPTURE → SCAN
SCAN → CAPTURE → UPDATE → SCAN
Which of the following complexity-related factors affect system safety?
Decrease in operating speed
Complex component architecture
Excessively long development and production cycle
Software defects or human errors
How many flip-flops are required for implementing the TAP controller as per IEEE 1149.1 standard?
4
16
2
8
6
32
What are the disadvantages of concurrent online testing?
Requires automatic test equipment
Very high latency
Cannot detect transient faults
Requires a large amount of additional hardware
Which of the following factors contribute to the high cost of testing?
The cost of testing itself
Manufacturing cost
The cost of ATPG (Automatic Test Pattern Generation)
The cost of servicing systems (e.g., automobiles) due to faulty electrical components
Design cost
The cost of automatic test equipment
What is the system architecture that provides the best trade-off between safety and availability?
2oo3 (Two-out-of-Three)
2oo2 (Two-out-of-Two)
1oo2D (One-out-of-Two with Diagnostics)
2oo2D (Two-out-of-Two with Diagnostics)
1oo2Dcomp (One-out-of-Two with Comprehensive Diagnostics)
What additional testing technologies should be applied, besides stuck-at-0(1) testing, for better fault coverage?
Functional testing
Testing using the D-algorithm
Fault simulation in parallel
IDDQ testing
Testing using the critical path method
What are the advantages of functional testing?
Easy evaluation of fault coverage
Does not require knowledge of the netlist
Has diagnostic capabilities
Independent of specifications
Allows at-speed testing
Can be generated automatically
What are the mandatory instructions according to the IEEE 1149.1 standard?
RunBIST
Sample/Preload
Bypass
Intest
Extest
IdCode
HighZ
Clamp
What is the complexity of the March memory testing algorithm: {↕(w0); ↑(r0,w1); ↓(r1, w0); ↕(r0)}?
4ln(n)
6ln(n)
6n
4n
"From a safety perspective, software fails differently compared to hardware." Which of the following arguments support this statement?
Typically, software-related risk does not decrease with increased operational experience.
Software does not provide more flexibility compared to hardware.
Two different software modules do not fail independently.
The same discipline does not need to be applied to software as it is to hardware.
Which hypotheses are specific to the Jelinski-Moranda software reliability model?
The time intervals between successive failures are independent random variables, exponentially distributed with possibly different parameters.
At each software failure, a debugging process of negligible duration removes a fixed fraction c of the total errors N.
Both the operational time and the testing time of the software are considered.
The failure rate is proportional to the number of latent software defects.
Which of the following statements is correct? 1. In TTL circuits, short-circuit faults are modeled using OR gates. 2. In CMOS circuits, short-circuit faults are modeled using AND gates.
Neither
Both 1 and 2
Only 1
Only 2
Which of the following belong to the category of ad-hoc design-for-testability rules?
Using boundary scan techniques.
Providing two clocks: one for normal operation and one for testing (clock-scan).
Partitioning counters and shift registers.
Avoiding the use of logic redundancy.
Providing logic for breaking feedback loops.
Using LSSD registers.
Where can fault simulation be applied?
To evaluate the configurability of the circuit.
To convince management that the testing team is working efficiently.
To calculate fault coverage.
To construct the fault dictionary for later diagnosis.
To analyze testability.
To analyze circuit operation in the presence of faults.
Which of the following costs are associated with the testing process?
The cost of generating test vectors.
The cost of generating fault localization information.
The cost of paying managers.
The cost of production equipment for the tested unit.
Which of the following options are correct for the circuit below?
1 - TDI and 3 - TCK
2 - TSM and 3 - TCK
2 - TSM and 4 - TDO
1 - TDI and 4 - TDO
Which of the following formulas correctly represent the availability coefficient and the proportion of availability? Ka (availability coefficient) = MTBF / (MTBF + MTR), Kd (availability proportion) = MTR / MTBF
No formula is correct
Only the formula for Kd is correct
Both formulas are correct
Only the formula for Ka is correct
Which product lifecycle components belong to the Time to Market (TTM) phase?
Sales and distribution
Production process planning
Maintenance
Quality control
Installation and operation
Which of the following are principles of quality management according to ISO 9000:2015?
Relationship with banks for mutual benefit
Continuous improvement
Orientation towards societal requirements
Systematic management approach
Employee involvement
What is the probability of survival of a batch of products at time t = m (MTBF)?
e ^1
e^-2m
e^-1/2
e^-1
e^1/2
Which of the following definitions of dependability are correct?
Dependability is the collective term used to describe the lack of performance availability and the factors that influence it, including reliability performance, maintainability performance, and maintenance support performance.
Dependability describes how system components influence each other.
The dependability of a system is its ability to avoid failures of a service that are more frequent and severe than acceptable.
Dependability is the ability to provide a service that can be justifiably trusted.
What are the current transistor manufacturing technologies?
7 nm and 14 nm
14 nm and 22 mm
1 nm and 7 nm
1 nm and 22 nm
The ISO/IEC 90003 standard applies to:
Medical laboratories
Automotive industry
Software engineering
Vibrations and mechanical shocks
The difference between a good and a bad version of the circuit, for the same output, is called:
Excited fault
Error
Short
Examining a system in the middle of the development cycle to ensure that the outcome of one phase meets the requirements established in the previous phase is called:
Validation
Verification
Certification
LFSR (Linear Feedback Shift Registers) are used in testing for:
Capturing inputs/outputs of low-programmable circuits
Compressing output sequences at nominal frequencies
Generating pseudo-random input sequences
Considering the reliability indicators for series and parallel configurations, which statements are correct?
Only the formula for series is correct
Both formulas are correct
Only the formula for parallel is correct
The structure in the image is typical for:
LRNG (Lightweight Random Number Generator)
JTAG (Boundary Scan)
BIST (Built-in Self-Test)
How can a sequential circuit be simplified for computing the test vector?
By replicating the structure in sequential states into a large combinational circuit
By analyzing fault coverage dispersion for its probability of functioning within parameters
By searching for equivalence and dominant faults for all EXCLUSIVE AND gates in the circuit
The ability to determine the value at any node of a circuit by setting values at primary inputs and measuring primary outputs is called:
Observability
Predictability
Controlability
In ISO 9000, an independent external institution verifies an organization's quality management system and certifies compliance with required standards. This process is called:
Authorization
Certification
Accreditation
The "bathtub" curve refers to:
The evolution of the mean time between failures
The evolution of failure danger in time
The evolution of maintenance over time
IDDQ testing refers to:
Quality concerning the device’s stored data
Measuring the quiescent current of the circuit
Qualifying dominant tests through prioritizing them
Quality with respect to the data within the device
The structure in the image is typical for:
LRNG (Lightweight Random Number Generator)
BIST (Built-in Self-Test)
JTAG (Boundary Scan)
Why is concurrent engineering beneficial?
Because competition encourages innovation and lowers prices
Because parallel processing is much more efficient for neural networks
Because it considers all aspects of product development and lifecycle
What does "yield" mean in integrated circuit manufacturing?
The trade-off of lowering frequency for increased stability
The proportion of "defect-free" products among all manufactured products
The treatment of circuits against heat/radiation for harsh environments
What is the purpose of dynamically reducing voltage and frequency in a processor?
Better performance
Longer battery life
Easier testing
The "total probability formula" method refers to:
Calculating test coverage for test generation using binary polynomial coefficients
Calculating the probability distribution for a Gaussian distribution
Calculating the reliability of a system that cannot be decomposed into purely series or parallel structures
Online testing of digital circuits refers to:
The system being configured and connected to the internet
Testing the system's power supply lines
Testing the system during its normal operation
The ability to obtain known values at outputs in response to a given set of input stimuli refers to:
Predictability
Controllability
Observability
The process of examining the final stage of development to ensure that the result meets system requirements is called:
Evaluation
Verification
Validation
What is the main advantage of RAID 1 (mirroring)?
Magneto-resistive memory
Faster data access
Better reliability
The ability to set a specific value at each node of the circuit by assigning values to primary inputs is called:
Observability
Controllability
Predictability
In digital circuit testing, output compaction refers to:
Designing the circuit with fewer outputs for increased testability
Keeping the output in a high-impedance state for testing another circuit
Computing the digital signature of the outputs to reduce the need for storing large amounts of data
The concept of "aliasing" in testing refers to:
An input combination may result in correct outputs, even if a fault is present in the circuit
A test that can be used to detect more faults, including stuck-at and dual faults in a circuit
A testing device that can be used for testing multiple circuits with the same structure
What is the main purpose of dynamically increasing voltage and frequency in processors?
Better performance.
Longer battery life.
Easier testability.
Which of the following are principles of quality management?
Owner-oriented approach
Customer orientation
Process-based approach
Relationship with banks for mutual benefit
What is the correct order of actions in a quality improvement process?
Plan → Act → Do → Check
Plan → Act → Check → Do
Plan → Do → Act → Check
Plan → Do → Check → Act
Plan → Check → Do → Act
Plan → Check → Act → Do
Offline testing of digital circuits means:
The system is used only for testing.
Testing secondary lines of the system.
The system is disconnected from the network.
According to Pareto's principle, X% of defects are caused by Y% of the causes. What are the correct values for X and Y?
X = 20, Y = 80
X = 20, Y = 20
X = 50, Y = 50
X = 80, Y = 20
Given the circuit in the figure and the test {0101}, the statement "The given test detects fault f/0" is:
True
False
Given the circuit in the figure and the test {1101}, the statement "The given test detects fault z b-1-0" is:
True
False
In hardware engineering, which of the following characteristics require a trade-off?
Customer requirements
Time-to-Market (TTM)
Functionality
Additional hardware
Given the circuit in the figure and the test {0101}, the statement "The given test detects fault g/1" is:
True
False
Which of the following steps do NOT belong to a chip testing plan?
Performance enhancement of the chip
Fault collapsing
Design verification
Testability analysis
Which of the following reliability formulas for serial and parallel system structures is correct?
- Rs = R1 * R2
- Rp = (1-R1) * (1-R2)
Both formulas are correct
Only the serial formula is correct
Neither formula is correct
Only the parallel formula is correct
Which product lifecycle components belong to the Time-to-Market (TTM) phase?
Maintenance
Quality control
Installation and operation
Production process planning
Sales and distribution
Which of the following formulas is correct, based on the course notation?
z(t)=(Δn×Δt)/N
z(t)=Δn/(Δt×N)
z(t)=(Δn×Δt)/N0
z(t)=Δn/(Δt×N0)
z(t)=Δt/(Δn×N0)
Which of the following elements are part of the quality management principles according to ISO 9000:2015?
Orientation towards societal requirements
Systematic management approach
Employee involvement
Relationship with banks for mutual benefit
A set of phones was tested for 150 hours. During this time, 3 failed. What is the failure danger?
50 failures/hour
450 failures
2%
How can we simplify a sequential circuit to compute the test vectors?
By analyzing the fault coverage dispersion for the probability of proper working
By replicating the structure, in its successive sequential states, into a large combinational circuit
By finding the equivalent and dominant faults for all the EXCLUSIVE-AND gates in the circuit
Online testing of digital circuits means:
The system is configured and connected to the network
Testing the system's powered lines
Testing the system during its normal functioning
Observe the circuit. Using a deductive simulator and the test {a:1, b:1, c:1}, model the simulation of which faults are detected by the given test vector. Mark all correct answers.
a/0
g/0
k/1
p/1
Observe the formulas for series and parallel reliability, respectively. Mark the correct answer.
Only the formula for series is correct
Both formulas are correct
Only the formula for parallel is correct
In testing, compacting the output refers to:
maintaining the output in a high impedance state, to test another circuit
calculating a digital signature of the output, to reduce the storage needs
designing the circuit with fewer outputs, for high testability
Which sequences would work properly? Mark all correct answers.
{↑↓(w0); ↑(r0, w1); ↑(r1, w0); ↑↓(r0)}
{↑↓(w0); ↑(r1, w1); ↓(r1, w0); ↑↓(r0)}
{↑↓(w0); ↑(r0, w1); ↓(r1, w0); ↑↓(r0)}
What is the main advantage of RAID 1 (mirroring)?
Magneto-resistive memory
Faster access to data
Better data reliability
Within ISO 9000, an independent external institution verifies the quality management system of an organization and recognizes its compliance with the standard's requirements. This process is called:
Certification
Habilitation
Accreditation
The ability to set a specific value in each node of the circuit by setting values on the primary inputs means:
Controllability
Predictability
Observability
When there is a difference between the good and the bad version of the circuit, on the same internal line, we talk about:
Excited fault
Error
Short
Offline testing of digital circuits means:
The system is used only for testing
The system is disconnected from the network
Testing the system’s secondary lines
The ability to find out the value on any node of the circuit by setting values on the primary inputs and measuring the primary outputs means:
Observability
Predictability
Controllability
Why is "concurrent engineering" good?
Because it considers all aspects of the product's development and life
Because parallel processing is more efficient for neural networks
Because competition fosters innovation and drives down prices
What is the main purpose of dynamically increasing the voltage and frequency in processors?
Better performance
Easier testability
Longer battery life
The notion of "aliasing" in testing refers to:
An input combination may result in correct outputs, even if a fault is present in the circuit
A test may be reused to detect multiple dual stuck-at faults in the circuit
A test equipment may be used to test many circuits that have the same structure
What does "yield" mean in integrated circuit manufacturing?
The heat/radiation treatment of circuits destined for harsh environments
The compromise of lowering the frequency to get more stability
The ratio of defect-free products out of all products manufactured
The process attesting that at the end of the development process, the result meets the system requirements is called:
Evaluation
Verification
Validation
How can we simplify a sequential circuit to compute the test vectors?
By replicating the structure in its successive sequential states in a large combinational circuit
By finding the equivalent and dominant faults, for all the EXCLUSIVE-AND gates in the circuit
By analyzing the fault coverage dispersion for the probability of proper working
The ability to obtain known values on the outputs in response to a set of given input stimuli means:
Controllability
Predictability
Observability
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