KYT-CAR Processor 2

A detailed illustration showing different CPU architectures, cache memory structures, and a variety of RAM types, set in a tech-themed background, emphasizing computer engineering concepts.

KYT-CAR Processor 2 Quiz

Test your knowledge on processor architecture and computer memory with the KYT-CAR Processor 2 Quiz! This quiz consists of 37 questions covering a variety of topics in computer science and engineering.

Are you ready to challenge yourself? Here’s what you can expect:

  • Questions on CPU design and functionality
  • Insights into memory types and usage
  • Understanding of performance metrics and improvements
37 Questions9 MinutesCreated by CodingGuru512
What type of architecture is composed of an ALU, a control unit and a memory?
Turing machine
Gothic
Vom Neumann
Finite state machine
According to Flynn's taxonomy, in which classification is a multi-core processor?
SISD
MIMD
SIMD
MISD
Compared to the main memory, cache memory is:
Bigger and faster
Faster and smaller
Smaller and slower
Bigger and slower
The algebra domain using only binary values was introduced by:
George boole
Charles Babbage
Edsger Dijkstra
Alan Turing
What instruction use different parts of modern CPU
LOAD/ADD
LOAD/STORE
ADD/SUB
ADD/AND
What type of RAM is generally used for the main memory?
ROM
DRAM
SRAM
EPROM
What type of RAM is generally used for the cache memory?
ROM
DRAM
SRAM
EPROM
What is an advantage of DRAM over SRAM?
It’s cheaper
It’s faster
Better bandwidth
Lower latency
What is an advantage of RISC over CISC?
Optimizes the number of instructions per program
Widely available for personal computers
Has a larger range of instructions
Faster instructions
In which type of notation are floating point values represented in binary?
Two’s complements
Classic notation
HTML
Scientific notation
According to Amdahl’s law, how much faster a program can go if we improve 50% of it?
2 times
0.25
0.5
4 times
Where is the cache memory generally integrated?
Into the CPU
In the BUS
Into the RAM memory
In the BIOS
What are the basic steps to perform an instruction?
Perform and print
Add, transfert and save
Loop, execute, and jump
Fetch, decode and execute
What design allows a CPU to start ab instructions before the end of the previous?
Caches
TLB
Pipelining
ALU
How does a CPU achieve high performance parallelism?
By having a hight frequency than CPUs
By using cache memory
By having a lot of simple cores performing the same operation at the same time
By having an extended set of instructions
Which law states that the density of transistors doubles every 18 months?
Amdahl’s law
Murphy’s law
Bell’s law
Moore’s law
What does the program counter register contain?
The address of the next instruction
The number of programs
The number of cycles
The return address
Dependencies between instructions can create something in a pipeline, what is it?
Holes
Bubbies
Segmentation faults
Core dump
How does a program take advantage of the cache memory?
By doing memory
By reusing data
By unrolling loops
By spacing data in the memory
What do we use translate code from a high-level programming language to assembly?
An IDE
A Hex editor
A compiler
A parser
Circuit used to store one bit can be built with:
3 XOR gates
2 NOR gates
1 AND gate
2 AND gates
On out of order processors, instructions are scheduled:
Statically
First in, first out
Dynamically
Round robin
What is assembly language?
A list of bits
A hight level programming language
A symbolic representation of machine instructions
An object oriented programming language
In perfect condition, hardware pipelining achieves?
1 instructions every 2 cycles
1 instructions per cycles
2 instructions per cycles
Over 9000 instructions per cycle
In a Von Neumann architecture, what is contained in the memory?
Instructions
DATA and instructions
Cache
DATA
How many transistor are required to build an AND gate?
1
2
3
4
(0,0) = 0, (0,1) = 1, (1,0) = 1, (1,1) = 0 is the truth table of:
ND
NOT
XOR
OR
If the first bit of a floating point value in binary is 1, the value is:
Lower than 255
Greater than 255
Negative
Positive
ARM processors use what type of architectures?
ARM
RISC
GPU
CISC
How does a branch predictor improve the results?
By using pipeline
By using cache memory
By transferring more data
By performing the same operation more frequently
What are theoretical elements of a Turing machine:
LOAD, STORE, PUSH, PULL
A memory, a control unit and an arithmetic unit
An infinite tape, a reading/writing tape, a table of instruction
A list of states, with for each state an entry action and an exit action
The 3 parts that compose a float in binary are the sign, the exponent and:
The mantissa
The sum
The opcode
The comma
Intel processors use what type of architectures?
ARM
RISC
GPU
CISC
DRAM strores the information in:
Capacitors
Wires
Resistors
Transistors
What method is used to represent signed integers in binary on modern computers?
One's complement
Flip Bits
Divide and conquer
Two's complement
What are the basics operations in boolean logic?
0 and 1
AND, OR, NOT
ADD, SUB, MUL
LOAD, STORE
At what point does a branch predictor predict branches?
Tea time
Link Time
Compile time
Runtime
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