Computer Architecture and Systems Quiz
Computer Architecture and Systems Quiz
Test your knowledge of computer architecture and systems with this comprehensive quiz! Dive into topics like registers, memory management, and floating-point numbers, and see how well you understand these fundamental concepts.
- Multiple choice and checkbox questions
- Designed for students and professionals alike
- Enhance your understanding of computer systems
The carry flag (C) can be used for:
Indication of the overflow when signed numbers (in 2’s complement code) are considered
Indication of the overflow when unsigned numbers are considered
Indication of the carry to the higher order when signed numbers are considered
Indication of the carry to the higher order when unsigned numbers are considered
General Purpose Registers (GPR) oriented ISA architectures use as operands:
The accumulator with other operand
Several dedicated registers
Any register
Values in the stack
The program counter can contain:
Instruction address to be fetched
Instruction to be executed
Stack address
Values of flags
Assume a complete set of CPU internal registers:
All of them are accessible by the user
All of them can keep constants
Some of them serve to keep values of variables
Some of them can keep memory addresses only
Suppose the following floating-point number format: sign (1 bit), exponent in biased code (4 bits), and mantissa in sign-magnitude code (7 bits, the sign not included); hidden one is used, M = 2. Determine the total number of positive floating-point numbers that are represented by images having the exponent value 2:
64
128
256
2048
The carry look-ahead adder:
Is faster than the ripple-carry adder
Is smaller than the ripple-carry adder
Which basic operations are needed to perform multiplication of unsigned numbers?
Subtraction
Addition
Shifting to the left
Shifting to the right
Volatile memory means:
It loses its content when it is disconnected from power
It is read-only
Its content must be periodically refreshed
The memory write cycle represents:
The minimum time period which is needed for successfully writing data into any address of a particular memory
The minimum frequency of accessing any memory address
The maximal allowed time period within which writing data has to be completed
Main memory of the capacity 128k words (1 word = 16 bits) is to be assembled from chips having the capacity 32 kB. Check correct statements:
For accessing any address of the main memory there are needed altogether 18 address lines
15 address lines will be decoded inside each chip
Three address lines will be decoded externally
8 chips are needed
Precision loss during a right-shift (by 1 bit) in the 2s complement code is indicated by
XORing two most significant bits in the original operand
The most significant bit of the original operand
ORing two most significant bits of the original operand
The least significant bit of the original operand
The second most significant bit of the original operand
In General Purpose Registers (GPR) oriented IS architectures, branching instructions influence
Values of registers
Values in memory
Values of flags (status register)
The execution flow of the code
Assume an accumulator-oriented ISA.
The result of any arithmetic operation can be stored in any register
One operand of the ALU has to be placed into accumulator
Operands of arithmetical operations have to be placed in the stack
The output of the ALU is written to the accumulator
Suppose the following floating-point number format: sign (1 bit), exponent in biased code (4 bits) and mantissa in sign-magnitude code (7 bits); hidden one is used, M = 2. Determine the distance between two neighboring numbers which are represented by images having the exponent value 7 (decoded from the biased code):
2^-7
2^-6
1
2^-5
2^-7
The Output Enable (OE) memory control signal. Select one or more:
Enables reading the data
Makes the data visible at the output
Enables writing the data
What is the size of a memory with a 32-bit address (address bus width) and an 8-bit data bus?
4 GB
512 GB
256 MB
� 16 Gbit
�256 Mbit
512 Mbit
The LRU (least recently used) algorithm indicates that the requested item was found in the cache.
True
False
Paging: a page of a certain number must be placed into the frame having the same number.
True
False
The memory write cycle represents:
The minimum time period which is needed for successfully writing data into any address of a particular memory
�The maximum allowed time period within which writing data has to be completed
The minimum frequency of accessing any memory address
Which basic operations are needed to perform multiplication of unsigned numbers?
Shifting to the right
Subtraction
Addition
Shifting to the left
The overflow flag (V) can be used for Select one or more:
Indication of the overflow when signed numbers (in 2's complement code) are considered
Indication of the overflow when unsigned numbers are considered
Indication of the carry to the higher order when signed numbers are considered
Indication of the carry to the higher order when unsigned numbers are considered
Mark correct answers about the stack:
The stack can be filled during the run time only
The stack can share the program memory or the data memory
Its individual items are accessed by addresses located in machine instructions
An item can be placed into stack by the processor automatically
Any program necessitates using of the stack during execution
Suppose the following floating-point number format: sign (1 bit), exponent in biased code (4 bits), and mantissa in sign-magnitude code (7 bits); hidden one is used, M = 2. Determine the total number of floating-point numbers that are represented by images having the exponent value 3:
128
256
2048
512
� 1024
64
Volatile memory means, Select one or more:
It is read-only
It loses its content when it is disconnected from power
Its content must be periodically refreshed
What is the size of a memory with a 16-bit address (address bus width) and an 8-bit data bus?
1 MBit
16 MB
128 kB
64 KB
2 MB
512 bit
For a partially associative cache, it holds:
Tach item has only one location where it can be stored
Each item has a limited number of locations where it can be stored
Any item can be placed at any location
Translation of virtual addresses into the real address is carried out statically before program execution.
True
False
A memory-addressable unit represents
The number of memory address bits
The total number of memory cells
The number of memory bit cells that are accessible by a single address
The number of memory bits that are read in parallel
Overflow during a left-shift (by one bit) in the 2's complement code is indicated by
The second most significant bit of the original operand
XORing two most significant bits in the original operand
ORing two most significant bits of the original operand
The most significant bit of the original operand
The least significant bit of the original operand
The program counter can contain
Stack address
Instruction to be executed
Values of flags
Instruction address to be fetched
The CPU flags (values of the status register) are generated by
Registers
CPU controller
ALU
Suppose the following floating-point number format: sign (1 bit), exponent in biased code (4 bits), and mantissa in sign-magnitude code (7 bits); hidden one is used, M = 2. Determine the total number of positive floating-point numbers that are represented by images having the exponent value 2:
256
2048
1024
128
64
512
What is the size of a memory with a 20-bit address (address bus width) and an 8-bit data bus?
1MB
320MB
2MB
16MB
1MBIT
320 BIT
Volatile memory means
It loses its content when it is disconnected from power
It is read-only
Its content must be periodically refreshed
Overflow during a left-shift (by one bit) in the 2's complement code is indicated by
ORing two most significant bits of the original operand
The second most significant bit of the original operand
The least significant bit of the original operand
XORing two most significant bits in the original operand
The most significant bit of the original operand
In General Purpose Registers (GPR) oriented ISA architectures, load/store instructions influence
The execution flow of the code
Values in memory
Values of flags (status register)
Values of registers
The program counter can contain
Values of flags
Instruction address to be fetched
Instruction to be executed
Stack address
Two numbers having different exponents in floating-point representation are to be multiplied. Mark all correct statements:
Exponents are added
The operands must be transformed to the forms having equal exponents first
Mantissas are multiplied
Operands in normalized form should be shifted left
The Output Enable (OE) memory control signal
Enables writing the data
Enables reading the data
Makes the data visible at the output
When the one-way set associative cache is full and a new item should be introduced into the cache, then the item which is to be overwritten (victim) is fully specified by its class (row) and the RU algorithm is not used.
True
False
Translation of virtual addresses into the real address is carried out in run-time.
True
False
Assume different memory types and mark correct answers:
The SRAM memory is volatile
The PROM memory loses its content when power is off
For accessing items within the CAM-like memory, the address is needed
The EPROM memory has to be refreshed periodically
The ROM-like memory can keep its content even when it is not powered
For accessing an item within the FIFO-like memory, we do not need to know the address
For a fully associative cache, it holds:
Each item has a limited number of locations where it can be stored
Any item can be placed at any location
Each item has only one location where it can be stored
Page fault causes the page transfer from the virtual memorv into the main memory.
TRUE
FALSE
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