PAPM Quiz 1

Data Locality has 2 key perfomances
Temporal
Spatial
Temporary
Shared
Basic Schemes for Enforcing Coherence
Migration
Translation
Replication
False-Sharing
True-Sharing
What Does SMP stand for
What Does NUMA stand for
What are the 4 C's
Compulsory
Capacity
Conflict misses
Coherence misses
Coherence hits
Conflict fix
Compliance
True-Sharing Misses
Miss
Due to 1st write to shared block
Reads
Will occur if block size were 1 word
Invalidates
Another CPU/Core of modified block in different cache
What are 2 things that Coherency guarantees?
That a write will eventually be seen by other processors
All processors see writes to the same location in the same order
Reading an address should return the last value written to that address
Define the behavior of read and write accesses to a different memory location
Memory Model
Consistency
Defines the behavior of reads and writes wrt. Accesses to different memory locations
Consistency
Defines the behavior of reads and writes to the same memory location
Coherence
Determines when a written value will be returned by a read
Coherence
Defines what values can be returned by a read
Naive View
Reading an address should return the last value written to that address.
What are the 3 definitions of coherent memory system (select 1)
Preserve Program Order
Coherent view of memory
Write serialization
Read serialization
Suspended data localization
Caches have -
In multithreading a thread can be
Suspended (save registers in memory)
Resumed (restore registers in memory)
Paused (save registers in memory
Over-written (restore registers in memory)
Multiple threads can execute independently
In parallel on multi CPus/Cores (physical concurrency)
Arbitrarily interleaved on a single CPU/core (logical concurrency)
In parallel on one CPU but multiple Cores (physical concurrency)
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