SAP exam
Master the SAP Exam
Are you ready to test your knowledge in the world of SAP? This quiz is designed for those who are preparing for SAP exams or anyone interested in enhancing their understanding of SAP technology. Challenge yourself and see how well you grasp this critical area of IT.
- 16 challenging questions covering various SAP topics
- Multiple choice and written answer formats
- Perfect for both beginners and advanced learners
What is the size of a memory with a 16-bit address (address bus width) and an 8-bit data bus?
16 MB
2 MB
512 kbit
128 kB
16 kbit
512 bit
Characteristics of SRAM memories are:
The core of the memory cell is a latch
Memory access times are shorter in comparison with DRAM memories
When they are not regularly read, they need to be periodically refreshed
For the implementation of a 1-bit cell, there are 4 transistors used
The power consumption is greater than in case of DRAM memories
In comparison with DRAMs, they are cheaper and allow higher integration
The core of the memory cell is a flip-flop
The memory cells are volatile
Determine the image in the floating-point representation of a given (hexadecimal) number; assume the 16b standard format, in the normalized form. Here the most significant bit (MSB) represents the sign, 4 bits long exponent in biased code with K=7 follows (7 is added to the exponent), and the absolute value of the mantissa is stored in the 11 least significant bits. The hidden leading one principle is used. Write the resulting image in hexadecimal (16 bits). Write the result as two numbers divided by comma. The number in hexadecimal: -0x7A.
How many 4-input functions do there exist?
256
65536
4
16
The flip-flop setup time is
The time for which the input must be stable before the active clock edge
The time needed to hold the input after the active clock edge
The time for which is the output stable
The time needed to propagate the data from master to the output
What is the number of flip-flops needed to implement a FSM with 10 states using 1 out of N state encoding? Type just the number, no text is allowed.
What is the number of data outputs of a 4-to-1 multiplexer? Type just the number, no text is allowed.
What is the number of data outputs of a 1-to-4 demultiplexer? Type just the number, no text is allowed.
What is the range of numbers that can be represented in the 2’s complement code with a 16-bit number format (M=65536)?
-65536...+65535
-32767...+32768
-65535...+65535
-32768...+32767
-32768...+32768
-32767...+32767
-65535...+65536
-65536...+65536
An incompletely specified function f(a,b,c,d) , where a is the LSB, is given by a list of 1-minterms and don't care-minterms: f(a,b,c,d)=∑1(0,1,5,7,10,14)+∑x(6,15) . Check correct answers:
B⋅c is a part of the optimum solution of f
b⋅c is a prime implicant of f
�b⋅c is an essential prime implicant of f
The optimum solution has 3 terms
A prime implicant of a function F is
An implicant that is not covered by any other implicant
Can be a minterm
A product term that must be included in all minimum sum-of-products implementations of F
Only a product term that covers a 1-minterm, which is not covered by any other product term
The majority of three (MAJ3) function can be described as (_a=not a)
F=_abc+ab_c+a_bc
F=ab+ac+bc
F=abc
Overflow during a left-shift (by one bit) in the sign-magnitude code is indicated by
The most significant bit of the original operand
The least significant bit of the original operand
The second most significant bit of the original operand
ORing two most significant bits of the original operand
XORing two most significant bits in the original operand
In General Purpose Registers (GPR) oriented ISA architectures, arithmetic instructions influence
Values in memory
Values of flags (status register)
Values of registers
The execution flow of the code
Mark correct answers about the stack:
The stack can be filled during the run time only
Its individual items are accessed by addresses located in machine instructions
An item can be placed into stack by the processor automatically
Any program necessitates using of the stack during execution
Suppose the following floating-point number format: sign (1 bit), exponent in biased code (4 bits), and mantissa in sign-magnitude code (7 bits); hidden one is used, M = 2. Determine bounds of the interval within which there lie all positive numbers having the exponent value 2 (decoded from the biased code):
[8, 16)
[2, 4)
[1, 2)
[4, 8)
The Output Enable (OE) memory control signal
Enables writing the data
Makes the data visible at the output
Enables reading the data
What is the size of a memory with a 32-bit address (address bus width) and an 8-bit data bus?
256 MB
16 Gbit
512 Mbit
256 Mbit
32 GB
32 Gbit
Assume different memory types and mark correct answers:
The EPROM memory has to be refreshed periodically
The SRAM memory is volatile
The ROM-like memory can keep its content even when it is not powered
The PROM memory loses its content when power is off
For accessing an item within the FIFO-like memory, we do not need to know the address
The EEPROM memory is volatile
Given a 16-bit image Y, which is a floating-point number representation of the number X. In the representation, the most significant bit (MSB, from the left) represents the sign, 4 bits long exponent in biased code with K=7 follows (7 is added to the exponent), and the absolute value of the mantissa is stored in the 11 least significant bits. The hidden leading one principle is used. Determine the number X (in hexadecimal), when the image (in hexadecimal) is: Y = 0x78B0. (Write the answer as the exponent in decimal and the result in hexadecimal, divided by comma If the result is negative, write '-' here, in front of the number
The overflow flag (V) can be used for
Indication of the overflow when signed numbers (in 2’s complement code) are considered
Indication of the overflow when unsigned numbers are considered
Indication of the carry to the higher order when signed numbers are considered
Indication of the carry to the higher order when unsigned numbers are considered
Assume a complete set of CPU internal registers.
Some of them can keep memory addresses only
All of them can keep constants
All of them are accessible by the user
Some of them serve to keep values of variables
Suppose the following floating-point number format: sign (1 bit), exponent in biased code (4 bits) and mantissa in sign-magnitude code (7 bits); hidden one is used, M = 2. Determine the distance between two neighboring numbers which are represented by images having the exponent value 7 (decoded from the biased code):
2^-5
2^-7
2^+7
1
2^-6
Volatile memory means
It loses its content when it is disconnected from power
It is read-only
Its content must be periodically refreshed
What is the size of a memory with a 16-bit address (address bus width) and an 8-bit data bus?
16 MB
2 MB
512 kbit
128 kB
16 kbit
512 bit
What is the size of a memory with a 32-bit address (address bus width) and an 8-bit data bus?
512GB
512Mbit
256MB
16Gbit
4GB
256Mbit
Page fault causes the page transfer from the virtual memory into the main memory.
True
False
When the one-way set associative cache is full and a new item should be introduced into the cache, then the item which is to be overwritten (victim) is fully specified by its class (row) and the RU algorithm is not used.
True
False
Precision loss during a right-shift (by 1 bit) in the 2s complement code is indicated by
ORing two most significant bits of the original operand
The most significant bit of the original code
The second most significant bit of the original operand
XORing the two most significant bits of the original operand
The least significant bit of the original operand
Suppose the following floating-point number format: sign (1 bit), exponent in biased code (4 bits), and mantissa in sign-magnitude code (7 bits); hidden one is used, M = 2. Determine the total number of positive floating-point numbers that are represented by images having the exponent value 2:
512
1024
256
64
128
2048
General Purpose Registers (GPR) oriented ISA architectures use as operands:
The accumulator with other operand
Values in stack
Any register
Several dedicated registers
The program counter can contain
Instructions to be executed
Instructions address to be fetched
Stack address
Values of flags
Mark correct answers about the stack:
Its individual items are accessed by addresses in machine instructions
An item can be placed into the stack by the processor automatically
Any program necessitates using the stack during the execution
Stack can be filled during runtime only
The stack can share the program memory or the data memory
Volatile memory means
It is read only
It losses its content when disconnected from power
Its contents must be periodically refreshed
A memory-addressable unit represents
The number of memory bits that are read in parallel
The number of memory address bits
The number of memory bit cells that are accessible by single address
Total number of memory cells
In General Purpose Registers (GPR) oriented ISA architectures, load/store instructions influence
The execution flow of code
Values in registers
Values of flags (status registers)
Values in memory
For a partially associative cache, it holds:
Each item has only one location where it can be stored
Each item has a limited number of locations where it can be stored
Any item can be placed in any location
Paging: a page of a certain number must be placed into the frame having the same number.
True
False
The carry look-ahead adder:
Is smaller then the ripple-carry adder
Is faster then the ripple-carry adder
Which basic operations are needed to perform multiplication of unsigned numbers?
Addition
Right shift
Subtraction
Left shift
The memory write cycle represents:
The minimum frequency of accessing any memory address
Minimum time period which is needed for successfully writing the data into any address of a particular memory
The maximum time period within which writing of data must be completed
Overflow during a left-shift (by one bit) in the 2's complement code is indicated by
Least significant bit of the original operand
ORing the two most significant bits of the original operand
XORing the two most significant bits of the original operand
The most significant bit of the original operand
The second most significant bit of the original operand
What is the size of a memory with a 16-bit address (address bus width) and an 8-bit data bus?
2MB
512bit
128kbit
64KB
16MB
1 Mbit
For a fully associative cache, it holds:
Any item can be placed in any location
Each item has only one location where it is stored
Each item has a limited number of locations where it can be stored
Translation of virtual addresses into the real address is carried out in run-time.
True
False
Assume an accumulator-oriented ISA.
One operand of the ALU has to be placed into the accumulator
Operands of arithmetical operations have to be placed into stack
The result of arithmetic operations can be stored in any register
The output of ALU must be written to the accumulator
In General Purpose Registers (GPR) oriented IS architectures, branching instructions influence
Values in memory
The execution flow of code
Values of flags
Values of registers
The carry flag (C) can be used for:
Indication of the carry to the higher order when unsigned numbers are considered
Indication of the overflow when unsigned numbers are considered
Indication of the carry to the higher order when signed numbers are considered
Indication of the overflow when signed numbers (in 2’s complement code) are considered
Suppose the following floating-point number format: sign (1 bit), exponent in biased code (4 bits), and mantissa in sign-magnitude code (7 bits, the sign not included); hidden one is used, M = 2. Determine the total number of positive floating-point numbers that are represented by images having the exponent value 2:
2048
64
256
128
Translation of virtual addresses into the real address is carried out statically before program execution.
True
False
What is the size of a memory with a 20-bit address (address bus width) and an 8-bit data bus?
1MB
16MB
1Mbit
320MB
320bit
2MB
Two numbers having different exponents in floating-point representation are to be multiplied. Mark all correct statements:
Mantissas are multiplied
Exponents are added
The operands must be transformed to the forms having equal exponents first
Operands in normalized form should be shifted left
The LRU (least recently used) algorithm indicates that the requested item was found in the cache.
True
False
Suppose the following floating-point number format: sign (1 bit), exponent in biased code (4 bits), and mantissa in sign-magnitude code (7 bits); hidden one is used, M = 2. Determine the total number of floating-point numbers that are represented by images having the exponent value 3:
1024
256
128
512
2048
The CPU flags (values of the status register) are generated by
Registers
ALU
CPU controller
What is the number of flip-flops needed to implement a FSM with 200 states using 1 out of N encoding?
The output of Moore-type FSM depends on
The current state only
Current state and output
The input only
How many inputs and outputs has the half adder
3 in, 3 out
2 in, 2 out
3 in, 2 out
2 in, 3 out
How many transistors has the 2-input NAND gate in CMOS
4
3
5
6
2
An essential implicant of F
Must be a prime implicant
Is a product term that covers a 1-minterm, which is not covered by any other product term
Is a product that must be included in all minimum sum of products implementations of F
Any product term included in minimum sum-of-products implementation of F
Asynchronous sequential circuits are synchronized by
Clock edge
Clock level
Inputs other then clock
An implicant
Is a product term covering only 1's and possibly don't cares in Karnaugh map
Is always a product term containing all variables of the fun
Can be minterm
What is the range of numbers that can be represented in sign-magnitude code with 16-bit number format (M=65536)
-65535...+65536
-65536+65535
-32767...+32767
-32678...+32767
-32768...+32768
-65536...+65536
How many transistors has the 2-input OR gate in CMOS
6
5
3
4
2
The full adder function can be described as (s is the sum of the output, cout is carry output, a and b are data inputs, cin is carry input
Cout=a*b+a*cin+b*cin
S=a*b+a*cin+b*cin
S=a+b+cin
S=a XOR b XOR cin
Cout= a XOR b XOR cin
Don't cares in a function F description (incompletely specified function)
Must be covered in a minimum sum-of-product implementations of F
Must not be covered in a minimum sum-of-product implementations of F.
Arise from flexibility in behaviour specification
Can be assigned any value (0 or 1)
Memory organization in Von Neumann's type computer is
Separate memory for code and data
Common memory for code and data
Convert -0x63 to 2's compliment code and using 8-bit number format (M=256). Type the hexadecimal in form of two characters (eg. 2A).
Assume an FSM of type Mealy having 2 inputs, 4 outputs and 3 internal states. The maximum number of different combinations that can appear of circuit output is
3
4
12
20
16
How many 3 input functions do there exist
3
27
9
256
The flip-flop hold time is
The time needed to propagate the data from master to the output
The time for which the input must be stable before the active clock edge
The time needed to hold the input after the active clock edge
Time for which the output is stable
The half adder function can be described as (s is the sum output, cout is carry output, a and b are data inputs)
Cout=a XOR b
S=a XOR b
Cout=a+b
S=a*b
S=a+b
Cout=a*b
What is the number of flip-flops needed to implement a FSM with 100 states using 1 out of N state encoding?
Assume an FSM of type Mealy having 2 inputs, 4 outputs and 3 flip-flops. The maximum of different combinations that can appear on the circuit output is:
20
32
3
12
16
256
What is the size of the memory with a 20-bit address (address bus width) and a 16-bit data bus?
1MBit
1MB
16MB
320MB
320bit
16Mbit
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